Many monitors, televisions and graphic or video display units are now using plasma or LCD displays instead of cathode ray tubes. Plasma based displays emit visible light that can be viewed so an image can be seen by a user. Conversely, LCD displays do not emit light and therefore require backlighting or a light source positioned behind such LCD displays so that a user can view the image, picture or information being displayed. Cold cathode fluorescent lights (CCFLs) have been used to backlight LCD displays. For large LCD displays, 10 to perhaps 25 CCFLs may be organized in parallel behind the LCD display to provide ample and uniform backlighting for user viewing. One or more CCFLs operating together require special high voltage circuitry such as a high voltage transformer or voltage multiplier circuitry along with CCFL dedicated driver circuit. This specialized circuitry, in conjunction with the 10 to 25 CCFLs, is not as energy efficient as providing the same amount of lumens with a plurality of white or ultra bright Light Emitting Diodes (LEDs).
Another drawback of CCFL backlighting is that CCFLs contain mercury. Mercury is well known toxic metal that if not disposed of properly has an adverse effect on the environment. CCFLs have a limited average expected operating life of between 10 to 20 thousand hours. Thus, if a monitor using CCFL backlighting is left on for about 2⅓ years (approximately 20 thousand hours of continuous use) one or more of the CCFL tubes within the monitor will most likely fail. Furthermore, as CCFLs age the amount of lumens they produce decreases (i.e., the CCFLs become dimmer over time). Another CCFL aging problem is that dim spots may appear in portions of the CCFL tubes. Over as little as 2.3 years, the picture quality of a CCFL backlit LCD television or monitor may include dim screen portions and an overall lower quality picture.
Another drawback of using CCFLs is that CCFLs must be placed a distance from the back of the LCD screen so that the light emitted from a plurality of spaced CCFL tubes can diffuse in order to provide a substantially uniform brightness across the entirety of the LCD screen. The spacing requirement of CCFLs away from the back of an LCD screen makes the minimum thickness of a large LCD screen monitor or television to be at least three or more inches thick in order to accommodate the cavity space necessary for installing the CCFL backlighting.
More recently with the discovery and advancement of white LEDs, it has been determined that while such LEDs are suitable for backlighting liquid crystal displays. White LEDs generally use a blue LED that includes a phosphor coating thereon. When the blue LED is turned on, the phosphor coating glows a slightly yellow color, which combines with the blue light from the LED. Generally, the combination of the LED's blue light and the yellowish glow of the phosphor creates an overall white light output.
White LEDs (WLEDs) can be placed along the edge of a liquid crystal display screen such that they emit light into a specially designed light guide. The light guide is basically a large piece of plastic positioned behind the LCD display, which receives light photons emitted from the WLEDs into the edges of the light guide and then distributes the light photons, in a substantially uniform fashion, in a direction that is perpendicular and toward the back of the entire LCD screen. Using this type of light guide configuration, an LCD display, monitor or TV using WLEDs for backlighting (or “side lighting”) can be manufactured to be significantly thinner than an LCD display incorporating CCFL backlighting technology.
For a medium to large LCD monitor or screen, there may be 50 to more than 200 WLEDs connected in one or more series circuits about the edges of the monitor's light guide. There are basically two methods being commonly used for designing driver circuitry for WLEDs used in backlighting applications in LCD displays. A first method comprises designing a boost circuit or similar switching regulator pre-regulator stage followed by multiple current sinks that regulate the current in one or more strings of LEDs. Although this first method is optimum from a driver circuitry cost point of view, it requires that the LED forward voltages, which are used in any such driver circuitry, to be closely matched in order to avoid high heat dissipation in the current regulator sinks. This issue becomes important in television display and monitor applications where many LEDs must be connected in series.
A second type of driver circuitry commonly used with WLEDs in backlighting applications includes a boost regulator circuit having a high enough output voltage to be able to drive many WLEDs. For example, where 70 or more WLEDs are connected in series, an output voltage required to drive the LEDs can be around 300 volts or more. For a boost regulator to provide a 300 volt output, the input of the boost regulator would need to be around 100 volts. Boost topologies used in the mentioned first and second types of drivers are hard switched, constant frequency circuit design topologies. Furthermore, such hard switched topologies are not suitable for operation at frequencies above about 100 kHz. These hard switched topologies are physically limited to switching frequencies at or below about 100 kHz. To operate at around 100 kHz requires the use of relatively large inductors and filter capacitors. In particular, output capacitor values of 10 μF or more are necessary for such prior boost regulator drivers that have switching frequencies of about 100 kHz when ceramic capacitors, which are customary, are used. These large capacitor values must also be rated for an operating voltage of 350 volts or more, thereby making them relatively expensive components. In addition, when such high valued capacitors (greater than 10 μF) are used there is the potential for the creation of acoustic noise at the pulse width modulated (PWM) dimming frequencies used on the LEDs. PWM dimming frequencies are generally within the human hearing range of 20 to about 2,000 KHz. The acoustic noise of these ceramic high voltage capacitors is exacerbated by the dielectric materials used within the capacitors. The dielectric materials, because of their size, are prone to a piezoelectric acoustic effect, which generates audible sound or sounds emanating from the capacitors.
The prior hard switched boost topologies that provide an output voltage in the range of about 300 to 350 volts (or even higher) have power loss inefficiencies resulting from the continuous charging and discharging of parasitic capacitances associated with the solid state components of the driver circuitry. It is believed that the main parasitic capacitance responsible for power loss is associated with the drain-source capacitance of a switching power MOSFET transistor used within such circuits. For example, a typical MOSFET might have about 100 picofarads (pF) of such parasitic capacitance between its drain to source terminals. If one assumes a 500 kHz switching frequency, the resulting power loss in the form of heat dissipated just due to the MOSFET drain-source parasitic capacitance is:
                                                                                          P                  LOSS                                =                                ⁢                                                      1                    2                                    ⁢                                      CV                    2                                    ⁢                  f                                            ⁢                                                                                                                      =                            ⁢                              0.5                ⁢                                  (                                      100                    ⁢                                                                                  ⁢                    pF                                    )                                ⁢                                                      (                                          300                      ⁢                      v                                        )                                    2                                ⁢                                  (                                      500                    ⁢                                                                                  ⁢                    kHz                                    )                                                                                                        =                            ⁢                              2.25                ⁢                                                                  ⁢                watts                                                                        (                  Equation          ⁢                                          ⁢          1                )            
The above calculation clearly shows that one drawback of hard switched boost topologies operating at switching frequencies above 100 kHz, for example 500 kHz, can result in at least 2.25 watts of power being lost on a continuous operational basis.
Another drawback of hard switched driver circuit topologies is that although it is advantageous to operate such boost regulator circuitry in what is called a Discontinuous Current Mode (DCM), which helps to reduce the output diodes reverse recovery losses, such DCM operation produces severe high frequency spikes and undesirable switching node ringing. Such severe high frequency spikes produce EMI and other electrical noise that is difficult to mitigate and that may have a negative affect on other nearby circuitry.
Referring now to FIG. 1, a prior art boost regulator circuit with boost topology is shown. Basically, a boost regulator 100 has a voltage (V) input 102 of, for example, 100 volts and a V output 104, voltage of about 300 volts. Generally, a boost regulator has a ratio of voltages from VIN to VOUT. For the prior art boost regulator 100 we are assuming the VIN to VOUT ratio is 1:3. Certainly, other ratios are readily possible. The basic workings of the prior art boost regulator comprises turning the switching transistor 106 on and off. Turning the transistor 106 on and off will pull the switching node 108 toward ground or 0 volts when transistor 106 is on and then letting the switching node 108 go to the VOUT 104 voltage when transistor 106 is off. As the switching node 108 is switched from ground to VOUT 104, the L1 inductor 110 stores and releases energy. When the energy is released from the L1 inductor 110, the energy is sent through a D1 diode 112 providing voltage increase or boosted voltage at the output 104, as measured across C2 capacitor 114 and/or C3 capacitor 116.
C2 and C3 capacitors 114 and 116 are used to smooth out the output voltage 104 as the D1 diode 112 is turned on and off to deliver the energy stored in the inductor 110 in a pulse shaped current form.
A voltage divider circuit comprising R1 resistor 118 and R2 resistor 120 is connected to the VOUT 104 node and provides a Feedback (FB) voltage 122 to a control circuit 124. The control circuit 124 measures the feedback voltage 122 in relationship to a voltage reference to make sure that the output voltage 104 is within a predetermined range. The feedback circuit within the control circuit 124 attempts to regulate the output voltage to a steady voltage.
The DL output of the control circuit 124 provides a gate driver signal 126 to the gate of the switching FET 106. The Current Sensor (CS) input 128 of the control circuit 124 is a current sense input that reads a voltage at the current sense node 130. The sensed voltage is created by a current flowing from the source of the switching FET 106 through the R1 resistor 132. The current sense signal 128 is used by the control circuit 124 to help determine when to turn the switching FET 106 off via the switching signal 126. The CS signal 128 is also used by the control circuit 124 to sense when or if there is an over current condition through the source of the switching FET 106. If an over current condition exists through the switching FET 106 then the control circuit turns off the switching FET 106 via the switching signal 126.
In prior boost regulators having a similar topology as is shown in FIG. 1, the switching frequency of the switching transistor 106 is intended to be as high as possible. But, due to power loss and circuit design limitations, the switching frequency of such prior boost regulator circuits has been limited to a frequency of about 100 kHz to perhaps 250 kHz.
One reason for wanting to operate the switching frequency as high as possible is that the components, being the inductor 110 and the C2 and C3 capacitors 114 and 116 can be smaller in size and be lower induction (Henry) and capacitance (Farad) value components, if the boost regulator is operated at higher and higher frequencies. The component sizes of the inductor 110 and the capacitors 114 and 116 can be decreased at the higher switching frequencies while the voltage boost ratio from the voltage input 102 to the voltage output 104 is maintained. In other words, theoretically the higher the operating switching frequency, the smaller the reactive components required to produce the same power from VIN 102 to VOUT 104.
Given the basic circuit design of the prior boost regulator 100, there are physical limitations associated with an increase in switching frequency that limit how high the switching frequency can go even as the reactive components (C1, C2 and C3 capacitors 134, 114 and 116 and the inductor 110) are decreased in size and value. The switching frequency limitations of the prior boost regulator circuit have to do with the parasitic capacitances associated with the MOSFET or switching transistor 106, the inductor 110 and diode 112.
In electrical circuits, parasitic capacitance is the unavoidable and usually unwanted capacitance that exists between the parts of an electronic component or circuit simply because of their proximity to each other. All actual circuit elements such as inductors, diodes, and transistors have internal capacitance, which can cause their behavior to depart from that of “ideal” circuit elements. For example, an inductor often acts as though it includes a parallel capacitor, because of its closely spaced insulated conductive windings. The inductor windings act like plates of a capacitor and store a charge. Any change in the voltage across the inductive coil requires extra current to charge or discharge the parasitic capacitance therein. When the voltage does not change very quickly, as in low frequency circuits, the extra current required is usually negligible, but when the voltage is changing at higher and higher frequencies, the extra current becomes a large quantity and can dominate the operation of the circuit. In a transistor, such as the switching transistor 106, there is a parasitic capacitance that exists between the gate and drain, the gate and source, and the drain and source leads of the device. These parasitic capacitances in the transistor are formed at the junctions of the semiconductor materials within the transistor device. Furthermore, a parasitic capacitance will exist in the diode 112.
Parasitic capacitances for the switching transistor may range, for example, from about 50 picofarads to about 300 picofarads for the three parasitic capacitances (i.e., gate to drain, drain to source, and source to gate parasitic capacitances). For the diode 112 the parasitic capacitance associated with the semiconductor junction therein may be anywhere from about 50 to about 100 picofarads.
The switching node 108, which is the same node as the drain connection of the switching transistor 106, may have a total equivalent parasitic capacitance associated with it of from about 200 to about 300 picofarads. This node, the switching node 108, has been given this name because as the switching transistor 106 is turned on and off by the switching signal 126, the switching node is switched or pulled from a low potential to a high potential and back again at the switching frequency. The switching node 108 is pulled essentially to ground when the transistor 106 is on and then quickly switched to about the output voltage 104 (plus, for example, the voltage drop across the diode 112) when the switching transistor 106 is turned off. As this switching process between, for example, virtually 0 volts to about 300 volts occurs the charge on the parasitic capacitance 136 associated with the switching node 108 must charge and discharge at the frequency of the switching process. As shown above in Equation 1, the power loss associated with the charging and discharging of the parasitic capacitance of a typical MOSFET may be around 2.25 watts or more assuming a 500 kHz switching frequency. This power loss is discharged in the form of heat dissipation. The higher the switching frequency the higher the power loss in the form of heat.
Furthermore, in addition to the power loss and heat dissipation, the switching transistor 106 is encountering and being driven from a very high voltage to a very low voltage and vice versa at the switching frequency. It is also enduring being switched from a very high current flow to a zero current flow and vice versa as it switches. While the transistor 106 is switching from a low voltage to a high voltage and vice versa there is a moment therein that there is both a very high voltage and a very high current flow across and through the drain and source portions of the transistor 106. If this high voltage and high current found across and through the switching transistor is integrated over time, one finds that it is the source of an additional power loss called the “switching loss” of the transistor. This power loss occurs during the switching time as the transistor switches on and off. The switching time of the switching transistor 106 may occur in the range of about 30 to about 75 nanoseconds. Referring back again to Equation 1, power loss is equal to one-half of the current times the voltage squared PLOSS=½CV2f. Thus it is easy to see as switching frequency increases the amount of power loss also increases. As the switching frequency of the switching transistor 106 increases, the inefficiency of the hard switched boost regulator 100 also increases. There is a balance that must be made between increasing the switching frequency of a hard switched boost regulator, which allows the reactive components of the boost regulator to be smaller and smaller, but which increases the power loss or inefficiency of the same circuit. So a design decision must be made between how high a frequency to operate the device 100 with smaller components at a lower cost balanced against an amount of energy or power loss in the form of heat that can be accommodated.
What is needed is a boost regulator circuit design that allows the circuit to operate at frequencies above 200 or 250 kHz without the boost regulator circuit suffering from reactive or parasitic power losses at the higher switching frequencies.
Another drawback associated with the prior hard switched boost regulator circuits is that the gate switching signal 126 requires a strong driver circuit within the control circuit 124, due to the high voltage swing of the drain-gate capacitance of the switching transistor 108.
Yet another drawback of the prior boost regulator circuitry is due to the diode recovery losses in the D1 diode 112. The D1 diode 112 is turning completely on and then turning completely off while encountering high voltage changes. In essence, the diode is going from a completely on state and then in an instant, when the switching transistor 106 turns on, the D1 diode 112 is reverse biased and switched off. Of course, in reality, there is no such thing as a diode instantly turning on and instantly turning off. Diodes have a significant parasitic capacitance, which in our example is being charged to 300 volts when the switching transistor is off and then must discharge the 300 volts and go to ground when the switching transistor 106 is hard switched turned on. Reverse biasing a diode that has a very large voltage potential in a very short period of time causes the diode's parasitic capacitance charges to have to dissipate extremely quickly. As a result, for a few nanoseconds the diode, as it is switching, is actually in a virtual short circuit state while the charges in the parasitic capacitance of the diode are being charged or discharged. During the instant that the virtual short exists across the diode, a very high voltage and a very high current exist therein, which not only must be dissipated as power loss heat, but also creates severe high frequency spikes of current. These very high frequency spikes of current travel and ring through the D1 diode 112 as well as through the switching transistor 106 via the drain connection to the switching node. These high frequency current spikes also result in emitting switching noise in the form of electromagnetic interference (EMI), which is transmitted by the circuit and could be coupled or picked up by other nearby unrelated circuitry. Such EMI coupling could potentially cause circuit malfunctions or dropped data in other circuits.
Yet another negative aspect of prior boost regulator circuitry 100 may be noise produced in the large high voltage ceramic capacitors such as C2 capacitor 114 and C3 capacitor 116. These high voltage capacitors are not only expensive, but because of their high values and large size, which is required for operating at 100 to 200 kHz frequencies, the dielectric plates within the high voltage ceramic capacitors produce a piezoelectric acoustic noise generated due to a Pulse Width Modulated (PWM) DIM frequency used in many LED applications for brightening and dimming the lumen output of the LEDs (not specifically shown). Since the PWM DIM frequency used for dimming and brightening the LEDs is usually in the 20 to 20,000 Hz frequency range, the piezoelectric acoustic noise generated by the high voltage ceramic capacitors is within the hearing range of humans who may be near the electronic device. Of course, such noise is undesirable if emitted from a television, monitor or other LCD display device. It should be noted that electrolytic capacitors are generally not desirable and whenever possible avoided in such prior circuits because their life span is much shorter than the high voltage ceramic capacitors. Furthermore, electrolytic capacitors are much larger and bulkier than ceramic capacitors.
What is needed is a boost regulator circuit or a boost driver circuit for white LEDs for use in backlighting applications that can operate at frequencies exceeding 200 kHz (200 kHz to about 2 MHz) so that the size and cost of the reactive components in the circuit can be decreased without an inefficiency produced in the circuit due to CV2 (power) losses from parasitic capacitances and transistor switching losses of the circuit. Furthermore, it would be desirable to have such a high frequency boost regulator that minimized the diode recovery losses and severe high frequency spikes or EMI created by a switching diode during reverse biasing along with elimination of any piezoelectric acoustic noise generated on the high voltage ceramic capacitors due to PWM DIM switching frequencies causing current modulation of the output voltage when prior hard switched boost regulator circuits are used in LED lighting or other power supply management device applications.